ADI’s ADSP-BF518F EZ-Board evaluation system is used to evaluate the functions of the ADSP-BF518F Blackfin processor. The I/O voltage of the processor is 3.3V, and the core voltage is controlled by DP1715 and AD5258, while the Blackfin processor ADSPBF518F, Adopt ADI/Intel Micro Signal Architecture (MSA), integrate dual MAC signal processing engine, have orthogonal RISC microprocessor instruction set, single instruction multiple data (SIMD) multimedia function, mainly used in industrial control, motor control, instrumentation Instrumentation, Femto base station, network audio, VoIP and other fields. This paper introduces the main features, block diagram, Blackfin processor core block diagram of ADSP-BF518, and the main features, block diagram, circuit diagram and bill of materials of ADSP-BF518F EZ-Board evaluation board.

The ADSP-BF512/ADSP-BF512F, ADSP-BF514/ADSPBF514F, ADSP-BF516/ADSP-BF516F, ADSP-BF518/ADSPBF518F processors are members of the Blackfin® family of products, incorporating the Analog Devices/Intel Micro Signal Architecture (MSA ). Blackfin processors combine a dual-MAC state-of-the-art signal processing engine, the advantages of a clean, orthogonal RISC-like microprocessor instruction set, and single-instruction, multiple-data (SIMD) multimedia capabilities into a single instruction-set architecture.

The processors are completely code compatible with other Blackfin processors.

Main features of ADSP-BF518:

Up to 400MHz high performance Blackfin processor

Two 16-bit MACs, two 40-bit ALUs, four 8-bit video ALUs, 40-bit shifter

RISC-like register and instruction model for ease of programming and compiler-friendly support

Advanced debug, trace, and performance monitoring

Wide range of operating voltages

Qualified for Automotive Applications

168-ball CSP_BGA or 176-lead LQFP with exposed pad

MEMORY

116K bytes of on-chip memory

External memory Controller with glueless support for SDRAM and asynchronous 8-bit and 16-bit memories

Optional 4M bit SPI flash with boot option

Flexible booting options from internal SPI flash, OTP memory, external SPI/parallel memories, or from SPI/UART host devices

Code security with Lockbox secure technology

One-time-programmable (OTP) memory

Memory management unit providing memory protection

PERIPHERALS

IEEE 802.3-compliant 10/100 Ethernet MAC with IEEE 1588 support (ADSP-BF518/ADSP-BF518F only)

Parallel peripheral interface (PPI), supporting ITU-R 656 video data formats

2 dual-channel, full-duplex synchronous serial ports (SPORTs), supporting 8 stereo I2S channels

12 peripheral DMAs, 2 mastered by the Ethernet MAC

2 memory-to-memory DMAs with external request lines

Event handler with 56 interrupt inputs

2 serial peripheral interfaces (SPI)

Removable storage interface (RSI) controller for MMC, SD,

SDIO, and CE-ATA

2 UARTs with IrDA support

2-wire interface (TWI) controller

Eight 32-bit timers/counters with PWM support

3-phase 16-bit center-based PWM unit

32-bit general-purpose counter

Real-time clock (RTC) and watchdog timer

32-bit core timer

40 general-purpose I/Os (GPIOs)

Debug/JTAG interface

On-chip PLL capable of frequency multiplication

ADSP-BF518 Markets and Applications:

VoIP

Industrial Control

Motor Control

Femto Cells

Networked Audio

Instrumentation

Figure 1. ADSP-BF518 block diagram

Figure 2. ADSP-BF518 Blackfin processor core block diagram

ADSP-BF518F EZ-Board Evaluation System

ADSP-BF518F EZ-BoardTM Evaluation System

This EZ-Board is designed to demonstrate the ADSP-BF518F Blackfin processor capabilities. The processor has an I/O voltage of 3.3V. The core voltage of the processor is controlled by an Analog Devices ADP1715 low dropout regulator (LDO) and an Analog Devices AD5258 digipot, which is configurable over the 2-wire interface (TWI) signals.

The ADSP-BF518F EZ-Board provides example programs to demonstrate the capabilities of the product.

Figure 3. ADSP-BF518F EZ-Board Evaluation Board Outline Drawing

The evaluation board is designed to be used in conjunction with the VisualDSP++® development environment to test the capabilities of the ADSP-BF512/BF512F, ADSP-BF514/BF514F, ADSP-BF516/BF516F, and ADSP-BF518/BF518F Blackfin processors. The VisualDSP++ development environment aids advanced application code development and debug, such as:

• Create, compile, assemble, and link application programs written in C++, C, and assembly

• Load, run, step, halt, and set breakpoints in application programs

• Read and write data and program memory

• Read and write core and peripheral registers

• Plot memory

ADSP-BF518F EZ-Board Evaluation Board Key Features:

• Analog Devices ADSP-BF518F Blackfin processor

? Core performance up to 400 MHz

? External bus performance up to 80 MHz

? 176-pin LQFP package

? 25MHz crystal

• Programmable VDDINT core power

? Analog Devices AD5258 TWI digital potentiometer

? Analog Devices ADP1715 low dropout linear regulator

• Synchronous dynamic random access memory (SDRAM)

? Micron MT48LC32M16A2TG – 64 MB (32M x 16-bits)

• Parallel flash memory

? Numonyx M29W320EB – 4 MB (2M x 16-bits)

• eMMC flash memory

? Micron MTFC2GDKDM – 2 GB

• SPI flash memory

? Numonyx M25P16 – 16 Mb

• Analog audio interface

? Analog Devices SSM2603 low-power audio codec

? One stereo LINE OUT jack

? One headphone LINE IN

? One input MIC jack

? One input stereo LINE IN jack

• Ethernet interface

■ National semiconductor DP83848 PHY device

? 10-BaseT and 100-BaseTX

? Auto-MDIX

• ADC interface

? Analog Devices AD7266 2 MSPS, 12-bit, 3-channel SAR analog-to-digital converter

• Thumbwheel

? Panasonic EVQ-WKA001 rotary encoder

• Universal asynchronous receiver/transmitter (UART)

? ADM3202 RS-232 line driver/receiver

? DB9 female connector

• LEDs

? Five LEDs: one board reset (red), three general-purpose (amber), one configurable ethernet LEDs (amber) and one power (green)

• Push buttons

? Three push buttons: one reset, two programmable flags with debounce logic

• Expansion interface II

? Next generation of the expansion interface design, provides access to most of the ADSP-BF518F processor signals

• Land grid array

? Easy probing of all port pins and most EBIU signals

• Other features

? JTAG ICE 14-pin header

? Blackfin power measurement jumpers

Figure 4. ADSP-BF518F EZ-Board Evaluation Board Block Diagram

Figure 5. ADSP-BF518F EZ-Board Evaluation Board Circuit Diagram (1)

Figure 6. ADSP-BF518F EZ-Board Evaluation Board Circuit Diagram (2)

Figure 7. ADSP-BF518F EZ-Board Evaluation Board Circuit Diagram (3)

Figure 8. ADSP-BF518F EZ-Board Evaluation Board Circuit Diagram (4)

Figure 9. ADSP-BF518F EZ-Board Evaluation Board Circuit Diagram (5)

Figure 10. ADSP-BF518F EZ-Board Evaluation Board Circuit Diagram (6)

Figure 11. ADSP-BF518F EZ-Board Evaluation Board Circuit Diagram (7)

Figure 12. ADSP-BF518F EZ-Board Evaluation Board Circuit Diagram (8)

Figure 13. ADSP-BF518F EZ-Board Evaluation Board Circuit Diagram (9)

Figure 14. ADSP-BF518F EZ-Board Evaluation Board Circuit Diagram (10)

Figure 15. ADSP-BF518F EZ-Board Evaluation Board Circuit Diagram (11)

Figure 16. ADSP-BF518F EZ-Board Evaluation Board Circuit Diagram(12)

Figure 17. ADSP-BF518F EZ-Board Evaluation Board Circuit Diagram(13)

Figure 18. ADSP-BF518F EZ-Board Evaluation Board Circuit Diagram(14)
ADSP-BF518F EZ-Board Evaluation Board Bill of Materials:

For details, see:
http://www.analog.com/static/imported-files/data_sheets/ADSPBF512_BF512F_BF514_BF514F_BF516_BF516F_BF518_BF518F.pdf
and
http://www.analog.com/static/imported-files/eval_kit_manuals/ADSP-BF518F%20EZ-Board%20Manual,%20Rev%201_1%20June%202009.pdf