ADI’s AD9253 is a four-channel 14-bit 125MSPS analog-to-digital converter (ADC) integrated with a sample-and-hold circuit. It has the characteristics of low cost, low power consumption, small size and easy use. The operating voltage is 1.8V, and each channel is at a rate of 125MSPS. Power consumption is 110mW, SNR = 74 dB, SFDR = 90 dBc and DNL = ±0.75 LSB, full power analog bandwidth 650MHz, programmable output resolution, mainly used in ultrasonic imagers, high-speed sampling, quadrature and multi-function radio reception This article describes the AD9253 product highlights and key features, functional block diagram, and AD9253CE01A evaluation board key features, circuit diagram, and bill of materials.
The AD9253 is a quad, 14-bit, 80 MSPS/105 MSPS/125 MSPS analog-to-digital converter (ADC) with an on-chip sample- and-hold circuit designed for low cost, low power, small size, and ease of use. The product operates at a conversion rate of up to 125 MSPS and is optimized for outstanding dynamic performance and low power in applications where a small package size is critical.
The ADC requires a single 1.8 V power supply and LVPECL-/ CMOS-/LVDS-compatible sample rate clock for full performance operation. No external reference or driver components are required for many applications.
The ADC automatically multiplies the sample rate clock for the appropriate LVDS serial data rate. A data clock output (DCO) for capturing data on the output and a frame clock output (FCO) for signaling a new output byte are provided. Individual-channel power -down is supported and typically consumes less than 2 mW when all channels are disabled. The ADC contains several features designed to maximize flexibility and minimize system cost, such as programmable output clock and data alignment and digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface (SPI).
The AD9253 is available in a RoHS-compliant, 48-lead LFCSP. It is specified over the industrial temperature range of −40℃ to +85℃. This product is protected by a US patent.
AD9253 Product Highlights:
Small Footprint. Four ADCs are contained in a small, space-saving package.
Low power of 110 mW/channel at 125 MSPS with scalable power options.
Pin compatible to the AD9633 12-bit quad ADC.
Ease of Use. A data clock output (DCO) operates at frequencies of up to 500 MHz and supports double data rate (DDR) operation.
User Flexibility. The SPI control offers a wide range of flexible features to meet specific system requirements.
AD9253 main features:
1.8V supply operation
Low power: 110 mW per channel at 125 MSPS with scalable power options
SNR = 74 dB (to Nyquist)
SFDR = 90 dBc (to Nyquist)
DNL = ±0.75 LSB (typical); INL = ±2.0 LSB (typical)
Serial LVDS (ANSI-644, default) and low power, reduced signal option (similar to IEEE 1596.3)
650 MHz full power analog bandwidth
2 Vpp input voltage range
Serial port control
Full chip and individual channel power-down modes
Flexible bit orientation
Built-in and custom digital test pattern generation
Multichip sync and clock divider
Programmable output clock and data alignment
Programmable output resolution
High speed imaging
Quadrature radio receivers
Diversity radio receivers
Figure 1. AD9253 Functional Block Diagram
AD9253CE01A Evaluation Board
The AD9253CE01A is an evaluation board for the AD9253-125 and the AD9633-125, quad 14 and 12-bit ADCs. This reference design provides all of the support circuitry required to operate the devices in their various modes and configurations. It is designed to interface directly with the HSC-ADC-EVALC data capture card, allowing users to download captured data for analysis. The Visual Analog software package, which is used to interface with the device’s hardware, allows users to download captured data for analysis with a user- friendly graphical interface. The SPI Controller software package is also compatible with this hardware, and allows the user to access the SPI programmable features of the AD9253 and AD9633. User guide UG-328 provides documentation and instructions to configure the device for performance evaluation in the lab. (WIKI Site)
The AD9253 and AD9633 data sheets provide additional information related to device configuration and performance, and should be consulted when using these tools. All documents and Visual Analog and SPI Controller are available at the High Speed ADC Evaluation Boards page.
Figure 2. AD9253CE01A Evaluation Board Outline Drawing
AD9253CE01A Evaluation Board Key Features:
Full featured evaluation board for the AD9253/AD9633
SPI interface for setup and control
External, on-board oscillator, or AD9517 clocking option
Balun/transformer or amplifier input drive option
On-board LDO regulator needing a single external 6 V, 2 A dc supply
VisualAnalog® and SPI controller software interfaces
Figure 3. AD9253CE01A Evaluation Board Circuit Diagram (1)
Figure 4. AD9253CE01A Evaluation Board Circuit Diagram (2)
Figure 5. AD9253CE01A Evaluation Board Circuit Diagram (3)
Figure 6. AD9253CE01A Evaluation Board Circuit Diagram (4)
Figure 7. AD9253CE01A Evaluation Board Circuit Diagram (5)
Figure 8. AD9253CE01A Evaluation Board Circuit Diagram (6)
Figure 9. AD9253CE01A Evaluation Board Circuit Diagram (7)
Figure 10. AD9253CE01A Evaluation Board Circuit Diagram (8)
Figure 11. AD9253CE01A Evaluation Board Circuit Diagram (9)
Figure 12. AD9253CE01A Evaluation Board Circuit Diagram (10)
AD9253CE01A Evaluation Board Bill of Materials See:
AD9253CE01A Evaluation Board Bill of Materials.xls
For details, see: