Power Supply Tip 32: Beware of SEPIC Coupled Inductor Loop Currents – Part 1

In this “power supplydesignTips, we will identify some leakage inductance requirements for coupled inductors in SEPIC topologies. SEPIC is a very useful topology when electrical isolation between primary and secondary circuits is not required and the input voltage is either higher or lower than the output voltage.We can use it instead of boost when short circuit protection is requiredconverter. SEPIC converters are characterized by a singleswitchoperation and continuous input current, resulting in lowerelectromagnetic interference (EMI). This topology (shown in Figure 1) can use two separate inductors (or since the inductors have similar voltage waveforms), and therefore a coupled Inductor, as shown. Coupled inductors are attractive because they are smaller in size and cost than two separate inductors.The disadvantage is that standard inductances are not always available for all possibleapplicationoptimize.

Power Supply Tip 32: Beware of SEPIC Coupled Inductor Loop Currents – Part 1

Figure 1 SEPIC converter uses a switch to ramp up and down the output voltage

The current and voltage waveforms of this circuit are related to the continuous currentmodel (CCM) The reverse circuit is similar. When Q1 is turned on, it uses the input voltage of the coupled inductor main stage to form energy in the circuit. When Q1 is turned off, the voltage across the inductor is reversed and then clamped to the output voltage. Capacitor C_AC is what differentiates the SEPIC from the inverse circuit; when Q1 is on, the secondary inductor current flows through it and then goes to ground. When Q1 is off, the primary inductor current flows through C_AC, increasing the output current through D1. A big benefit of this topology over a reverse circuit is that both the FET and diode voltages are clamped by C_AC and there is very little ringing in the circuit.In this way, we can choose to use lower voltages, and thus produce higher efficiencydevice.

Since this topology is similar to the inverse topology, many would argue that a tightly coupled set of windings is required. However, this is not the case. Figure 2 shows two operating states of a continuous SEPIC whose transformer has been modeled by leakage inductance (LL), magnetizing inductance (LM), and an ideal transformer (T). Upon inspection, the voltage of the leakage inductance is equal to the voltage of C_AC. Therefore, a large AC voltage with a small value of C_AC or a small leakage inductance results in a large loop current. Large loop current reduces converter efficiency and EMI performance, which we do not want to happen. One way to reduce this large loop current is to increase the coupling capacitor (C_AC). However, doing so comes at the cost of cost, size and reliability. A more astute approach is to increase the leakage inductance, which can be easily achieved by specifying a custom magnetic assembly.

Power Supply Tip 32: Beware of SEPIC Coupled Inductor Loop Currents – Part 1

2a) MOSFET ON: VLL = VC_AC – VIN = ∆VC_AC (DC part removed)

2b) MOSFET off: VLL = VIN + VOUT – VC_AC – VOUT = ∆VC_AC (DC part removed)

Figures 2a and 2b show two operating states of the SEPIC converter.
The AC voltage of the leakage inductance is equal to the coupling capacitor voltage.

Interestingly, very few manufacturers have recognized this fact and many have produced inductors with low leakage inductance for SEPIC applications.Coilcraft, on the other hand, has a 47 uH MSD1260 with about 0.5 uH leakage inductance, and is also available in the latestdevelopThere are other versions of this design with leakage inductances above 10 uH, which we will cover in our next Power Supply Design Tips, so stay tuned.

For this and other power suppliessolutionFor more details, please visit: www.ti.com.cn/power.


“SEPIC Converters Benefit From Leakage Inductance” by Betten, John, PowerPulse.net, http://www.powerpulse.net/techPaper.php?paperID=153

Coilcraft Catalog, MSD1260 Product Catalog.

The Links:   GD200FFX120C6S 2MBI150US-120-50

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