Use an oscilloscope to solve the problem of LCD screen drive timing debugging in one step

When debugging an abnormal Display on the LCD screen, it is necessary to repeatedly modify the drive parameters through the abnormal phenomenon, and the process is quite cumbersome. Use the ZDS4054 Plus long storage oscilloscope to capture the complete drive sequence, making it easy and quick to adjust the LCD screen drive parameters!

Abstract: When debugging an abnormal Display on the LCD screen, it is necessary to repeatedly modify the drive parameters through the abnormal phenomenon, and the process is quite cumbersome. Use the ZDS4054 Plus long storage oscilloscope to capture the complete drive sequence, making it easy and quick to adjust the LCD screen drive parameters!

When LCD screens are used for multi-screen splicing, frame synchronization abnormalities such as display image duplication and misalignment are prone to occur. In the past, it was necessary to perform reverse derivation based on abnormal phenomena and repeatedly debug and modify driver parameters, which was time-consuming and laborious. Using a long storage oscilloscope, you can capture the complete driving sequence at one time, and debug the LCD Controller without burning your brain. The following is an actual case to analyze the application of ZDS4054Plus in LCD LCD screen driving test.

1. The working principle of LCD controller and driver

To display text or images on the LCD, it is necessary to output RGB data to the LCD driver through the LCD controller. The LCD driver puts the data in the buffer, and then refreshes the LCD screen display at a rate of 60 frames per second.

The LCD controller realizes the control of each pixel through different combinations of row and column signals. This line scan (HYNC) signal cycle is very short (up to 40kHz-100kHz), so that a stable image can be displayed on the screen.

The signal timing and working principle of the LCD controller are as follows:

Use an oscilloscope to solve the problem of LCD screen drive timing debugging in one step

Figure 1 TFT display drive timing diagram

• VSYNC: frame synchronization signal, indicating the beginning of scanning one frame, one frame is also a picture displayed on the LCD;
• HSYNC: line synchronization signal, indicating the beginning of scanning 1 line;
• VCLK: pixel clock signal, each pulse fills 1 pixel;
• VDEN: Data enable signal, when the level is high, the filling data is valid;
• VD[23:0]: LCD pixel data output port.
• LEND: Line end signal.

Taking a 1024X768 pixel LCD screen as an example, the signal for a complete display of a screen image must include 1 VSYNC period, 768 effective HSYNC periods, and each VDEN high level includes 1024 pixel clock signals. Display problems can be checked by the frame synchronization signal, the frequency of the horizontal synchronization signal, the duty cycle, the delay, the number of HSYNC cycles included in each VSYNC cycle, and the number of VSCLK cycles included in the VDEN cycle.

2. Use ZDS4054Plus oscilloscope to solve LCD display abnormal examples

1. Picture overlay and repetition

Phenomenon: A wide range of images on the LCD display are misaligned, superimposed or repeated.

Cause: This situation is generally not caused by the delay of the horizontal synchronization or vertical synchronization signal, and the influence of this can be basically eliminated. You can check whether it is caused by a difference in timing or clock frequency.

Solution: The first thing you should do when encountering this situation is to carefully calculate the DMA transmission parameters and accurately adapt the line and field signals.

Use an oscilloscope to solve the problem of LCD screen drive timing debugging in one step
Figure 2 Image overlay and repeated sequence analysis

As shown in the screenshot of the oscilloscope, the corresponding signals of each channel are VCLK, VSYNC, VHSYNC, and VDEN signals in sequence. The analysis steps are as follows:

1) Since the complete signal time of a frame usually reaches more than 30ms, the oscilloscope needs to be adjusted to a time base of 10ms/div, and the VCLK signal frequency is usually as high as 48-96MHz, and the sampling rate must be maintained at least 500Ms/s to analyze the timing. At this time, an ordinary oscilloscope cannot fully capture the waveform.

2) ZDS4054Plus can still maintain a sampling rate of 1Gs/s under a time base of 10ms/div, and can perfectly restore the waveform. With the hardware frequency counter of each channel, it can analyze whether there is an abnormality in the frequency of each signal.

2. Image misalignment

Phenomenon: The LCD display is shifted in the horizontal direction, or there is a multi-pixel color, white or black stripe on the top or bottom.

Cause: Generally speaking, this situation is related to frame synchronization and line synchronization signals. If it is a normal abnormality, it may be that the initialization parameters are incorrectly set. If the abnormality occurs occasionally, it may be that the frame synchronization and line synchronization signals are interfered during the work process.

Solution: Check the match of the width, front and back delay, and polarity of the horizontal synchronization and vertical synchronization signals of the LCD controller.

Use an oscilloscope to solve the problem of LCD screen drive timing debugging in one step
Figure 3 Time sequence analysis of image misalignment

As shown in the screenshot of the oscilloscope, the corresponding signals of each channel are VCLK, VSYNC, VHSYNC, and VDEN signals in sequence. The analysis steps are as follows:

1) Analyze the positive and negative pulse width of each signal through full-screen measurement and statistics. If there is an abnormal value in the pulse width of VSYNC and VHSYNC, it can be judged as an abnormal display caused by interference signals.

2) If the pulse width is normal, the number of cycles can be calculated through interval measurement, analyze the direct mutual inclusion relationship of various large and small cycle signals, and check the timing parameters. 3) Analyze the delay between each timing signal through zoom mode and cursor measurement.

Use an oscilloscope to solve the problem of LCD screen drive timing debugging in one step

The Links:   SKIIP31NAC12T42 SK45GAL063

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